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In computer science, the Last In, First Out (LIFO) principle is a pivotal concept, especially when discussing data structures like stacks. Essentially, this principle ensures that the last element to be added to the stack will be the first to be removed, akin to a stack of plates; the topmost plate is both the last placed and the first to be taken off.

This characteristic is particularly useful in various programming scenarios such as function call management and, relevant to our main topic, interrupt handling in CPUs. To illustrate, imagine you're reading a book and suddenly remember you left the stove on. You place a bookmark on the page you're currently reading, which represents 'pushing' it onto a stack, before you rush to the kitchen. Upon returning, the bookmark – the last item 'pushed' to the stack – is the first you 'pop' off to resume reading where you left off.

The Interrupt Service Routine (ISR) is akin to the emergency response plan for a computer's processor. When an event occurs that requires immediate attention, much like an emergency signal, the CPU is 'interrupted' from its current task to address a higher-priority action.

In more technical terms, an ISR is a special block of code within the operating system or application that is executed in response to hardware or software interrupts. These routines are kept short and efficient, to process the interrupt signals swiftly and ensure minimal disruption to the normal execution flow of the system. While the ISR is active, the process diverted from by the interrupt remains on standby, with its context safely stored—usually on the stack—ensuring a seamless transition back to normal execution once the ISR has completed its job.

In the world of computing, saving the state of the CPU before handling an interrupt is of paramount importance. This process ensures that all the critical information representing the current point of execution is preserved, so the system can pick up exactly where it left off before the interruption occurred.

The 'state' typically includes the program counter (PC), which indicates the next instruction to execute, and the CPU registers, which may contain data critical to the current operation. By 'pushing' these elements onto the stack, they are securely stored following the LIFO principle. After the interrupt is addressed by the ISR, the CPU 'pops' this state information from the stack, effectively restoring the previous execution context, and resumes its normal operation as if the interrupt never happened. This meticulous process ensures data integrity and the seamless continuation of processes without loss of information or computation errors.